Tag Archives: dynamic signal analyzer

3562A Dynamic Signal Analyzer: LCD retrofit NewScope-5

Yet, another job related to the 3562A, same machine that also had the ROM board defect. This unit also has a weak display, and I have been asked to check replacement-repair options.

After a brief search, there aren’t any spare CRTs around, for the 1345A display used in the 3562A. The last good ones might have been purchased-stockpiled some years ago, by corporation that need to keep equipment going.

Well, fair enough. Luckily, failed CRTs and their limitations are a common feature of dated test equipment. So other have already invested time and effort to provide a solution: the LCD retrofit.

Why not just replace the whole instrument, with something new, up-tp-date, and more manageable? Several reasons:

(1) Many clients have proprietary-custom software running certain automated tests, using certain types and specs of test equipment. The final product specs have often been agreed upon with the OEM, in contracts that are a big hazzle to change. Some of these products, in fact, most, have long service life, so the test rig needs to be kept alive, more or less, at any cost.

(2) Cost – well, new test gear of the proper kind is outrageously expensive. Not taking about plain stuff here, but powerful equipment, network analyzers, spectrum analyzers.

(3) Servicabilty: talking about smaller businesses, not big corporation, often it is quite handy to stick with somewhat dated analyzers etc, because they are perfectly up for the task, the operators are trained, both in using and serviceing them, and often, spare units-parts units are around and can be procured at a fraction of the cost of repair of new equipment.

(4) Quality. Arguably, and except for new digital signal-fast scope stuff, the instruments build in the late 80s and early 90s might be the best ever build. Most of them have specs and typical performance far above what most regular quality can provide nowadays. The reason is simple, in the 80s, these rigs were build for the military and related agencies as the key target market. Nowadays, for consumer electronics, consumer communications… One exemple: the HP 8566B spectrum analyzer. Not sure about the price of such equipment nowadays, if build new – certainly 6 digits. On xbay, they go for about few cents per USD list 1985 list price… and be assured, no big deal to get them working in-spec.

The LCD replacement kits have come down in price considerably – earlier on, still USD 1000+, now, check this out:
NewScope-5 offer
USD 400. Not bad. This includes display. LVDS driver. And certainly, the controller board, to adapt the display to the 3562A.

Here, from the inside:
3652a lcd conversion newscope-5

The display: it’s a rather dated SHARP LCD DISPLAY, LQ057V3DG02, TFT 5.7″, 640×480. But rather then stockpiling CRTs, I now have a few of these in stock now – found them for about 15 EUR each surplus – this will allow service of the LCD-retrofit units, for years to come, without any need for modification to fit another type of LCD display…

I can tell you, such retrofit is worth every dollar. If you have any of the CRT analyzer with the screen gettin dimmer. Don’t hurt your eyes.

3562a lcd conversions newscope-5
A quick glance at it – it’s great to work with it – color display, rather than dim green display.
The color settings work fine for the most part – there are some little bugs in the NewScope-5, related to the text color, in some menues (first character has different color). However, this has really no impact on the great advantage of such LCD retrofit.

3562A Dynamic Signal Analyzer: EROMS fixed, finally!

The last and only remaining item to get the 3562A with the defective A3 ROM Board (03562-66503) back into service, replacing the defective EPROM. Well, I thought this would be a 30 minute job, but it ended up taking a few hours longer. Why? Multiple reasons:

(1) A bug in the AVR eprom reader software, specifically written to read the 3562A rom board (and similar boards, or other instruments – software always needs some adaption). One of the address lines was not toggled-ended up with corrupted data read from the “good” rom board.
Learning for today: always check the EPROM data read for validity, by checking for repeat patters, and by reviewing all the byte values. There should be at least a few 0xff values, otherwise, one of the data bus lines may be broken.

(2) Turns out, there are two versions even of the Rev B rom board, same part number, but eproms U118 and U218 that have the checksums are different. So, needed to desolder these two as well, and replace with the updated version from the working board.

The good ones on the left, the bad guys on the right…
3562a re-programmable vs one-time-programmable eproms 27256

(3) With all this, my eprom programmer, the only one I have that can handle 27256 EPROM had a defective jumper! No contact on one of the address lines….

After all these efforts: that’s the board, after repair:
3562a rom board

The replaced EPROMs are now in sockets – just in case, should they ever fail again.

Just in case you have to do a similar job – here are the EPROM images. Keep in mind, Rev B, 36x 27256 EPROM (sure, you can also use 27C256).
hp 3562a A3 ROM BOARD rev B

And, finally, let’s switch the power on-
3562a rom repair - complete!

All tests passed!

Note – just discovered, someone is offering a spare 3562A ROM board for about USD 100 on xbay…. well, well, but in the end, better a thorough repair, with all EPROM images captured, than just switching some board!

3562A repair: 32 kbyte of bad EPROM data….

Using the little AVRmega32L board, and the various plugs and cables, the two ROM boards (one good, one bad) were read, and all images of the ROMs compared. And, finally, the 6th EPROM of the lower byte – U106, only reads 0x00. That’s not how it is supposed to be. Also, after leaving the board switched on, U106 is warming up, much more than the others. So it is definitely at fault.

3562a U106 BAD EPROM

After some careful desoldering, the culprit was extracted. Cross checked the analysis with a regular EPROM programmer, and in fact, it is not working at all. Well, well. Now, just need to get a 27256 or 27c256, and this will fix the 3562A, and it can go back into service (imagine, this unit is still commercially used). Fair enough.

3562A Dynamic Signal Analyzer: reading the ROMs

I happen to have a 3562A for repair, which had a defective power supply, and after fixing this, it still doesn’t work – traced the error to the ROM board. It is really a coincidence that I own a more or less identical unit, which is working. Therefore, after checking all the supply rails to make sure nothing is going to damage it, I swapped out the ROM board with the working unit, and, there we go, it does the trick.

Now, how to find the defect? – first, a quick check of all the address logic, to no avail.

So the defect must be located in one of the ROMs. Have a look, the board has 2×18 pcs, Intel P27256, 32 kByte each:
3562a rom board 03562-66503 rev b

These chips are representing 589814 words of data (16 bit bus): a massive 1.179648 Megabytes, holding the program for the 3562a.

To get it powered up, first surprise, the thing draws nearly 2 Amps, about 55 mA each. Checked with the datasheet – and in fact that’s what these little heaters need.

Checking with the schematic, seems that this is an earlier version of the board, Revision B. That’s a pitty, because Rev C is much more common, and ROM images would be available off the web. Judging from the datecodes, manufactured in 1986. Still, a great instrument, low noise, build in source, and easy to use.

The circit of the board is really nothing special, a few decoders, and the memory bank, with some bus drivers.
03562-66503 address decoder

The plan is as follows:

(1) Read out the bad board (reading data from this first, just in case I accidentially damage something).
(2) Read the working board.
(3) Compare the EPROM images from both boards.
(4) Replace any defective EPROM(s). The ones installed are single time programmable, plastic case, but not an issue at all to replace them with regular UV-erasable EPROMs, if needed.

Desoldering all the 36 EPROMs – absolutely no option with the tools I have around here. With a few wires, and a ATmega32L board (JY-MCU AVR minium board V 1.4, always handy to have a few of them around), it was just a matter on an hour to get everything set up, not the fastest way, but the data will be clocked out byte by byte…

reading from the 3562a rom board 03562-66503 rev b

Now it is just a matter of time, for the defective chip to show up.

PLL frequency response measurement: a ‘not so fancy’ approach, for every lab

Measuring gain and phase shift of some decice doesn’t seem like a big deal, but still, how is it acutally done? Do you need fancy equipment? Or is it something of value for all designers of PLLs that don’t just want to rely on trial and error?

The answer – it’s actually fairly easy, and can be done in any workshop that has these items around:

(1) A simple function generator (sine), that can deliver frequencies around the band width of the PLL you are working with. Output level should be adjustable, coarse adjustment (pot) is enough. You will need about 1 Vpp max for most practical cases.

(2) A resistor, should be a considerably lower value than input impedance of the VCO. Typical VCOs might have several 10s of kOhm input impedance. Otherwise, put a unity gain opamp (e.g., OPA184) in between the resistor and the VCO tune input.

(3) A resistor, and some capacitors (depends a bit on the bandwidth), for general purposes 10-100 kHz, a parallel configuration of a 100n and 2.2 µF cap is just fine. In series with a resistor, a few kOhms. This network is used to feed a little bit of disturbance to the VCO, to see how the loop reacts to it… the whole purpose of this exercise.

(4) Make sure that the loop filter has low output impedance (opamp output). If your circuit uses a passive network as a loop filter, put in an opamp (unity gain) to provide a low output impedance.

(5) A scope, any type will do, best take one with a X-Y input.

Quick scheme:
pll gain phase measurement diagram

To perform the acutal measurements, the setup is powered up, and phase lock established by adequately setting the dividers, as commonly done.
The signals (X: drive=input to the VCO, Y: response=output of the loop filter) are connected to the scope. Set the scope to XY mode, AC coupled input, and SAME scale (V/div) on X and Y.

Next, set the signal gen to a frequency around the range of the expected 0 dB bandwidth (unity-gain bandwidth), and adjust the amplitude to a reasonable value (making sure that the PLL stays perfectly locked!). Amplitude should be several times larger than the background, this will make the measurements easier, and more accurate. If you have a spectrum analyzer, you can check for FM modulation. On the Micro-Tel 1295, which has a small ‘spectrum scan’ scope display, it looks like this:
1295 fm modulated signal during gain-phase test

On the X-Y scope display, depending on where you are with the frequency, it should show the shape of an ellipse, somewhat tilted – examples of the pattern (“Lissajous pattern”) below.

Frequency lower than 0 dB bandwidth – in other words, the loop has positive gain, therefore, Y amplitude (output) will be larger than X (input)
pll gain phase measurement - positive gain (frequency below BW)

Frequency higher than 0 dB bandwidth – in other words, the loop has negative gain, therefore, Y amplitude (output) will be smaller than X (input)
pll gain phase measurement - negative gain (frequency above BW)

And finally, same signal amplitude in X and Y direction.
pll gain phase measurement - 0 dB condition

Sure enough, you don’t need to use the X-Y mode, and circular patterns – any two channel representation of the signals will do, as long as their amplitude is measured, and the frequency identified, at which X and Y have equal amplitude (on the X-Y screen, also check the graticule, because the 45 degrees angle is not so easy to judge accurately). That’s the unity gain (0 dB bandwidth) frequency we are looking for. With little effort, the frequency can be measured to about 10 Hz.
The X-Y method has the big advantage that it relies on the full signal, not just certain points, and triggering a PLL signal with a lot of noise can be an issue.

Try to keep the amplitude stable over the range of frequencies measured – by adjusting the signal gen.

Ideally, the 0 dB bandwidth is measure at various frequencies over the full band of your VCO, because the bandwidth can change with tuning sensitivity, etc., of the VCO.

The 0 dB bandwidth is not the only information that can be extracted – also the phase shift is easily accessible. Just measure, at the unity gain frequency, or any other frequency of interest for you, the length of the black and red lines:
pll gain phase measurement - 0 dB condition - phase determination

The phase angle is then calculated by: divide length of red line, by length of black line, in this case, 4.6/6.9 units. Then apply the inverse sin function, to get the phase angle, sin^-1(4.6/6.9)=41.8 degrees. The 0 dB frequency, in this case, was 330 Hz.

A quick comparison with the data acquired using a more sophisticated methods, a HPAK 3562A Dynamic Signal Analyzer.

Gain: 0 dB at 329 Hz – that’s close!
pll test result - gain

Phase: 38.7 degrees – fair enough.
pll test result - phase

A proper PLL setup should provide at least 20 degrees of phase shift (note that this is not the so-called phase margin, which is a property of an open loop). Closer to 0 degrees, and the loop will remain stable, but a lot of noise (phase noise) and osciallation, finally, occasional loss of lock will be the result.

It’s also a good idea to check that the gain function drops off nicely – there are certain cases, where mulitiple 0 dB points exist – you need to look for the 0 dB point at the highest frequency.

Any questions, or if you need something measured, let me know.